Volume no :21, Issue no: 1, January (2020)

Journal of Materials Science and Engineering with Advanced Technology

ON APPROACH TO OPTIMIZE MANUFACTURING OF A TWO-LEVEL CURRENT-MODE LOGIC GATES IN A MULTIPLEXER BASED ON FIELD-EFFECT HETEROTRANSISTORS TO INCREASE DENSITY OF THEIR ELEMENTS. INFLUENCE OF MISMATCH INDUCED STRESS AND POROSITY OF MATERIALS ON TECHNOLOGICAL PROCESS

Author's: E. L. Pankratov
Pages: [27] - [77]
Received Date: October 12, 2019
Submitted by:
DOI: http://dx.doi.org/10.18642/jmseat_7100122105

Abstract

In this paper, we introduce an approach to increase density of field-effect transistors framework a two-level current-mode logic gates in a multiplexer. Framework the approach we consider manufacturing the inverter in heterostructure with specific configuration. Several required areas of the heterostructure should be doped by diffusion or ion implantation. After that dopant and radiation defects should by annealed framework optimized scheme. We also consider an approach to decrease value of mismatch-induced stress in the considered heterostructure. We introduce an analytical approach to analyze mass and heat transport in heterostructures during manufacturing of integrated circuits with account mismatch-induced stress.

Keywords

two-level current-mode logic, optimization of manufacturing, increasing of element integration rate.